The author perfected the content of this article on January 8th, 2020

Summary

The design of automotive systems has become more and more complicated because of the continuous addition of new functions such as advanced driver assistance, graphic instruments, body control and vehicle infotainment systems. In order to ensure reliable and safe operation, each subsystem requires a specific non-volatile memory to store information during reset operations and power switching.

Catalog

I The Application Requirements of Non-volatile Memory 

1.Common Types of Non-volatile Memory

Non-volatile memory is used to store important data such as executable code or constant data, calibration data, safety performance, and protection safety related information for future retrieval purposes.

The current market mainly includes these different types of non-volatile memory, such as NOR flash, NAND flash, EEPROM (Erasable Programmable Read-Only Memory), FRAM (Ferroelectric Memory), MRAM (Magnetic RAM) and NVSRAM (non-volatile static memory), etc. Each type of memory has its own advantages and disadvantages under different performance indicators: memory density, read and write bandwidth, interface frequency, durability, data retention, current consumption in different power modes (boot, standby/sleep, sleep), preparation time, sensitivity to external electromagnetic interference, etc.

2.Real-life Use Cases

To understand the real need for non-volatile memory in the latest automotive systems, engineers need to consider real-life use cases:

(1)After starting the car, is the driver willing to spend a few minutes waiting for the dashboard, odometer, and fuel level graphs to display properly?

(2)If the driver adjusts the seat position, steering wheel position, temperature settings and radio channels, but for some reason, he has to turn off the engine immediately. If the above sub-system fails to preserve the settings before the vehicle is turned off, is it not a lot of trouble for the driver to need to repeat it again?

(3)Although the car is equipped with the ADAS safety system, accidents may still occur. Can you provide the insurance research team with the required data, such as the status of different sensors a few seconds before the accident?

3.Related Consideration

For an ADAS system, it is very important to collect and store real-time data from a specific sensor to a non-volatile memory. Similarly for automotive entertainment systems, it is also important to be able to store system settings while the system is powered down. Both GIS and infotainment systems have high-definition graphic displays that not only need to store and read boot programs but also need to store and read very large configurations from external non-volatile memory.

In addition to meeting the needs of the application, non-volatile memory must also ensure sufficient read and write times to record data for at least 20 years. In addition, all subsystems should use AEC-Q100-compliant memory components in order to achieve automotive-grade certification and qualifications. At the same time, functional safety performance in accordance with the ISO 26262 standard is another system that requires this high level of safety.

This video is targeted to blind users about Non-volatile memory:

This video is targeted to blind users about Non-volatile memory

II The Memory Requirements of ADAS

1.Basic Principle of ADAS System

The ADAS system is primarily designed for automatic operation/auto-adjustment/enhancement of automotive systems for a safer, more comfortable driving experience. The safety function is mainly used to avoid accidents by avoiding collisions by alerting the driver to potential problems or by implementing protective measures and taking over control of the car. Adaptive features include automatic lighting, adaptive cruise control, automatic braking, combined GPS/traffic warning, connection to a smartphone, alerting the driver to other vehicles or dangerous conditions, keeping the driver in the correct lane and displaying the driver’s Blind spot.

Figure 1: ADAS system block diagram (Source: Cypress)

Figure 1 shows a simplified block diagram of how the ADAS system utilizes FRAM and NOR flash memory. External NOR flash is usually used to store boot code. However, various sensors in the ADAS system send data to the MCU periodically through the CAN (Controller Area Network) interface. The MCU runs an adaptive algorithm to check if it is possible to collide or if a collision has occurred. The runtime variables of the processing algorithm and the current state of the sensor are stored in the MCU's memory.

When the algorithm detects an accident, the airbag control module immediately activates the backup power supply and opens the airbag to ensure that power can be dissipated during the accident. The state of the sensor at the time of the accident should also be immediately stored in non-volatile memory for data recording. These data can effectively help understand the cause of the accident, prompting automakers to produce more advanced safety systems while assisting insurance companies in judging whether claims are valid.

The Drive Recorder (EDR) is a system for recording the data of each important subsystem before the accident. It can be installed in an ADAS master unit or in another MCU that receives important sensor data and communicates with the ADAS MCU. Engineers can now use multicore devices to provide a dedicated, complete CPU core for EDR functionality, such as Cypress's TraveoTM automotive microcontrollers.

The EDR judges the crash by measuring the impact force, vehicle speed, engine speed, steering input, throttle position, brake status, seatbelt status (detection of passengers), tire pressure, warning signal, and airbag opening status of the front vehicle pressure sensor. degree. And record the above data before and during the collision of the car. Obviously, the microcontroller cannot wait for the accident to start recording data. Therefore, the microcontroller needs to store data continuously. Therefore, EDR requires a non-volatile memory with an almost infinite number of writes.

2.Advantages of FRAM Memory 

FRAM memory has more advantages than ADAS's traditional EEPROM. The ability to store important data in real-time (actual 10us storage time)without the need for waiting is critical for ADAS. EEPROMs typically require more than 10 millisecond write latency and are therefore not suitable for high security applications. FRAM has both write-free delay and high-speed clock speed, making it ideal for applications that need to quickly write large amounts of data. When using the SPI, the designer is free to determine the number of bytes written to FRAM. When writing one or two bytes to a random location in FRAM, the write cycle is approximately 1 microsecond. In contrast to EEPROM or flash memory, a write cycle of 5 to 10 milliseconds is required.

Unlike EEPROM or flash memory, FRAM does not require a page buffer. After receiving the 8th bit of each byte, FRAM immediately writes each data byte. This means that when the system memory density increases, engineers do not have to worry about changes in page buffer size.

In terms of write endurance, FRAM can support 10 billion write operations, far more than 1 million times that of EEPROM and 100,000 times that of flash memory. Therefore, FRAM can be used as a trace data recorder, which can continuously write data. In addition, FRAM's write and read power consumption is very low (for example, 300 microamps at 1 Mhz), making it ideal for ADAS requiring a low-power backup power supply or data writing through capacitors when an accident causes a power failure. Compared to other non-volatile memories, the standby current of FRAM is much lower (usually 100 microamperes).

III The Memory Requirements of Car Ashboard 

1.The Dashboard System and HUD

The dashboard system digitally displays important information such as speed, fuel level, and engine temperature on a graphic display, or an analog display controlled by a stepper motor. In addition, the dashboard system can also display battery warnings, temperature warnings, low oil pressure warnings, brake warnings, seatbelt status indicators, low tire pressure indicators, door lock identifications, headlight identifications, gear shift indications, handbrake status indications, and In-vehicle and outdoor temperature, odometer readings, etc.

The latest dashboard system also includes a head-up display (HUD). The head-up display is an optical system that can project driving information on the windshield of the car. With a head-up display, drivers can easily see important driving information while keeping their eyes on traffic ahead. This can reduce the potential risk of leaving the road with your eyes and provide the driver with extra time to identify and react to risk factors. The HUD can display speed, navigation and other important warning symbols.

Figure 2: Dashboard System Block Diagram (Source: Cypress)

2.The Workflow of Dashboard System

Figure 2 shows a simplified block diagram of the dashboard installed around HyperRAM and HyperFlash (connecting the HyperBus interface) and NOR flash (connecting the DDR-HSSPI interface). Dashboard MCUs can connect other subsystems through different communication protocols such as CAN-FD, CXPI (Clock Extension Peripheral Interface), Ethernet AVB, MediaLB (Media Local Bus)/MOST (Media Oriented System Transport), and collect information. Displayed in the dashboard.

After the dashboard system is started, the security engine immediately verifies the authenticity of the firmware. Subsequently, XiP is executed from the NOR flash memory from the external HyperFlash through the HyperBus interface or through the DDR conversion DDR-HS SPI interface, and the MCU software starts execution. The XiP feature allows the MCU to execute code directly from external memory without first copying the external flash code into the internal RAM, increasing the speed of response. The NOR flash/HyperFlash memory can configure the initial address location of the program code and start in read mode after the specified clock delay. Therefore, the MCU can directly obtain the code to be executed as soon as it is started, and there is no need to delay the time by providing an address and a read command.

A static element can be retrieved from an external HyperFlash and displayed as the base layer of the dashboard LCD. Automotive MCUs, such as the Cypress TraveoTM family, provide additional functional support for instant decompression of static HMI elements without first passing through RAM. Dynamic content such as dashboard needle information can be updated faster and can be retrieved from an external HyperRAM.

IV The Memory Requirements For HVAC and Infotainment Systems

The HVAC (Heating, Ventilation and Air Conditioning) system is responsible for controlling the maintenance of the interior temperature and air flow. The infotainment system can run a variety of applications similar to smartphones and provide user interfaces to change HVAC system configurations, music system settings, enter destinations in navigation applications, adjust seat/wheel position/height, and adjust interior lighting, etc. . Some of the latest cars also have fingerprint readers to verify the identity of the driver. This allows HVAC and infotainment systems to quickly adjust the interior settings based on the driver’s preferences.

Figure 3: Block diagram of HVAC and infotainment system (Source: Cypress)

Figure 3 shows a simplified block diagram of the HVAC and infotainment system with all memory connected to the main MCU. Three additional subsystems compared to the dashboard system:

(1)Touchscreen controller for detecting finger touch on the monitor

(2)Heater/air conditioner to control the interior temperature

(3)Connect subsystems to implement multiple connections in the car (Bluetooth, GPS, WiFi, GSM, FM tuner, etc.)

HyperFlash and HyperRAM memory are used to store high quality graphics. NOR flash memory is used to store startup code, and FRAM is used to store setup information. Therefore, even if the vehicle starts immediately after the flameout, the car settings can be retrieved and restored correctly.

V Memory Interface

After discussing the requirements for non-volatile memory in different automotive areas, the different interface mechanisms between these memories and the MCU have also been discussed.

All MCUs with an SPI interface can easily connect NOR flash memory. NOR flash devices, such as Cypress's S25FL256L, provide the SPI with multiple I/O read-in options that support double data rate (DDR) and four times the peripheral interface (QPI) connections. Multiple flash memories can be connected on the same bus and individually accessed using Chip Select (CS) signals.

Figure 4: NOR flash interface to four-channel SPI (source: Cypress)

Figure 4 shows the hardware connection between the MCU and the NOR flash. The MCU can use low-level driver (LLD) software to read, program, and erase the NOR flash. The optimized design architecture effectively speeds up the access time and speeds up the program. At the same time, the internal technology used by NOR Flash determines the memory density. The NOR flash memory uses conventional floating gate technology. On the conductive layer, each memory cell can store one data bit. Based on the NOR flash memory built with MirrorBit technology insulation, each memory cell can store 2 data bits, providing a lower cost 256 Mb or greater density memory structure.

Figure 5: FRAM memory interface to the SPI (Source: Cypress)

Figure 5 shows how to use a simple SPI interface to access FRAM. The SPI interface is the ideal choice for microcontroller-based systems that require high-speed serial data rates. Serial data throughput is related to the serial clock frequency. The serial FRAM clock frequency can be as high as 40 Mhz. Microcontrollers without a dedicated SPI port can implement “bit bang” via GPIO (via GPIO pins to simulate serial communication with software).

HyperFlash and HyperRAM can be accessed through the HyperBus 12 signal interface. Compared to Quad-SPI (66.5 Mbps), HyperBus can provide up to 333 Mbps of read throughput while requiring only one-third of the pin count of parallel NOR flash. This interface uses differential clocking (CK, CK#), read-write data strobe (RWDS), chip select, and 8-bit data bus.

Figure 6: HyperBus interface between memory and peripherals (Source: Cypress)

VI Data Integrity and Security

Data integrity and security are two important factors in the selection of automotive application memory. The memory introduced in this article provides various functions to improve data integrity and security. For example, Advanced Sector Protection (ASP) technology provides higher resolution and different power-on reset for locked sectors and helps run safe boot code. At a basic level, the principle of ASP technology is simple. Any sector can be locked to prevent programming and deletion. There are two ASP modes for locking sectors: Persistent Protection Bit (PPB) and Dynamic Protection Bit (DYB) protection. In addition to block protection (BP) and/or WP# pin hardware protection, the above two modes can also be used together.

Automatic Error Correction Code (ECC) functions operate transparently during standard programming, erase, and read operations. When the device transfers each page of data from the write buffer to the storage array, the internal ECC logic uses the ECC code of the evaluation page as part of the storage array, which is invisible to the host system. Each time the initial page is accessed, the device evaluates the page data and ECC code to verify the integrity of the page. When necessary, internal ECC logic corrects 1 bit error on initial access.

The NOR flash also provides additional flash memory that can be programmed once and is permanently protected and cannot be changed. Take Cypress's FL-S NOR flash family as an example, this one-time-programmable (OTP) has a 1K protection area that contains a 512-byte factory protection zone and a 512-byte user protection zone.

Today's automotive systems require a variety of memory types, providing different levels of reliability, responsiveness, and throughput to meet the individual needs of different automotive subsystems. By choosing the right combination of memory, engineers can ensure the reliable and safe operation of the car, also meet the driver's expectations of the car's responsiveness.

VII Book Recommendation

1.Non-volatile Memories

Written for scientists, researchers, and engineers, Non-volatile Memories describes the recent research and implementations in relation to the design of a new generation of non-volatile electronic memories. The objective is to replace existing memories (DRAM, SRAM, EEPROM, Flash, etc.) with a universal memory model likely to reach better performances than the current types of memory: extremely high commutation speeds, high implantation densities and retention time of information of about ten years.

--by Pierre-Camille Lacaze , Jean-Claude Lacroix

2.Emerging Non-Volatile Memories

This book is an introduction to the fundamentals of emerging non-volatile memories and provides an overview of future trends in the field. Readers will find coverage of seven important memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), Multiferroic RAM (MFRAM), Phase-Change Memories (PCM), Oxide-based Resistive RAM (RRAM), Probe Storage, and Polymer Memories.

--by Seungbum Hong, Orlando Auciello, Dirk Wouters

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